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鄭信源
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Works:
1 works in 1 publications in 1 languages
Titles
一次就學會Verilog與VHDL
by: 鄭信源
(Language materials, printed)
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Subjects
電路
Verilog(電腦硬體描述語言)
VHDL(電腦硬體敘述語言)
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